Packet Trimming Deep Dive - Part III

Virtual Output Queue (VOQ)

The Silicon One VOQ Architecture

Instead of using dedicated deep interface buffers for packet queuing, Cisco Silicon One utilizes a Centralized Shared Memory architecture paired with a logical Virtual Output Queue (VOQ) mechanism. Because the VOQ concept is implemented within the Ingress (Rx) NPU entity, this queuing stage occurs after the initial ingress lookups but before the packet is switched across the internal fabric to the egress.

The VOQ model turns the traditional egress queuing model, where packets wait for serialization in a hardware buffer on the specific egress interface, upside down. While a VOQ is physically located on the ingress NPU, its ability to send traffic is controlled by the state of a small hardware Output Queue (OQ) on the egress interface.

Priority Mapping and Default State

As shown in Figure 9-3, a QoS policy can be created where a packet received on interface gi1/0/1 is assigned to Traffic Class 6 if the DSCP bits are set to EF (Expedited Forwarding). This configuration instantiates a VOQ specifically for that traffic class. In this hierarchy:

TC 7 (Control Plane/CS6): Mapped to OQ 1, the highest Strict Priority (Level 1).

TC 6 (DSCP-TRIMMED/EF): Mapped to OQ 2, the second-highest priority (Level 2).

By default, Silicon One enables VOQ 7 (Network Control) and VOQ 1 (Default/Best Effort). This ensures that critical control-plane traffic (DSCP 48/CS6) is guaranteed a high-priority path, to keep the network stable, while all unclassified data flows through the default VOQ. VOQs 5 – 2 are disabled by default.

Congestion Management and HoL Prevention

The VOQ mechanism is critical for handling "many-to-one" traffic patterns. For example, if four 800G ingress interfaces all send "elephant flows" to a single 800G egress interface, the egress OQ will become congested. Through a credit-based flow-control system, the egress port stops issuing credits to the specific ingress VOQs targeting it.

Because these queues are "virtualized" per output, this congestion does not cause Head-of-Line (HoL) blocking. Traffic destined for other, non-congested egress ports continues to receive credits and flow freely, even though they share the same physical ingress NPU.

Internal Isolation

The VOQ-OQ mechanism is entirely internal to the switch. Peer devices have no visibility into these internal queues; they only see the resulting serialized traffic stream and the DSCP/CoS markings in the packet headers.

Figure 9-3: Virtual Output Queue.